1. Field of the Invention
Embodiments of the invention relate to the field of semiconductor device fabrication. More particularly, the present invention relates to an apparatus for warming processed substrates above the dew point to prevent unwanted moisture on the processed substrate surfaces as well as reducing negative impact on manufacturing throughput.
2. Discussion of Related Art
Ion implantation is a process used to dope impurity ions into a semiconductor substrate to obtain desired device characteristics. An ion beam is directed from an ion source chamber toward a substrate. The depth of implantation into the substrate is based on the ion implant energy and the mass of the ions generated in the source chamber. One or more ion species may be implanted at different energy and dose levels to obtain desired device structures. In addition, the beam dose (the amount of ions implanted in the substrate) and the beam current (the uniformity of the ion beard can be manipulated to provide a desired doping profile in the substrate. However, throughput or manufacturing of semiconductor devices is highly dependent on the uniformity of the ion beam on the target substrate to produce the desired semiconductor device characteristics.
FIG. 1 is a block diagram, of an ion implanter 100 including an ion source chamber 102. A power supply 101 supplies the required energy to source 102 which is configured to generate ions of a particular species. The generated ions are extracted from the source through a series of electrodes 104 and formed into a beam 10 which passes through a mass analyzer magnet 106. The mass analyzer is configured with a particular magnetic field such that only the ions with a desired mass-to-charge ratio are able to travel through the analyzer for maximum transmission through, the mass resolving slit 107. Ions of the desired species pass from mass slit 107 through deceleration stage 108 to corrector magnet 110. Corrector magnet 110 is energized to deflect ion beamlets in accordance with the strength and direction of the applied magnetic field to provide a ribbon beam targeted toward a work piece or substrate positioned on support (e.g. platen) 114. In some embodiments, a second deceleration stage 112 may be disposed between corrector magnet 110 and support 114. The ions lose energy when they collide with electrons and nuclei in the substrate and come to rest at a desired depth within the substrate based on the acceleration energy.
A relatively low substrate or wafer temperature during ion implantation improves implant performance. Typically, the substrate is cooled by reducing the temperature of the platen 114 upon which the wafer is disposed in the range of between room temperature to about −100° C. Lower wafer temperatures reduce the amount of damage caused when ions hit the substrate (damage layer). This decreased damage layer improves device leakage currents and allows manufacturers to create abrupt source-drain extensions and ultra-shallow junctions needed for today's semiconductor devices. When the temperature of the wafer is decreased, the thickness of the amorphous silicon layer increases because of a reduction in the self-annealing effect. With a thicker amorphous layer, less tail channeling is expected. Damage created by beam ions is confined in the amorphous region and less damage is introduced into the crystalline region immediately beyond the amorphous-crystalline interface.
In addition to the benefits introduced by a thicker amorphous silicon layer, performing ion implantation at low temperatures also minimizes the movement of Frenkel pairs during implantation. As a result, fewer Frenkel pairs are pushed into the region beyond the amorphous-crystalline interface as compared to the case of higher substrate temperature implantation. Most of the Frenkel pairs will grow back into the lattice during the solid-phase epitaxy process and do not contribute to excess interstitials which cause transient enhanced diffusion or form extended defects. With fewer interstitials pushing channel or halo dopants into a channel region, less negative coupling; such as reverse short channel effect, may be achieved. Thus, better process control and prediction of device performance is obtained.
Once the substrate is cryogenically processed, the temperature of the processed wafer is below the dew point and must eventually be warmed to normal atmospheric temperature for removal from the implanter. However, processed wafers cannot go from a vacuum environment during implantation to normal atmospheric temperature without creating a coating of condensation on the surface of the wafer or even worse, frost when the wafer is below 0° C., may compromise the processed wafer. Current attempts to avoid such moisture during the warming process provide for placement of the processed wafer into a loadlock chamber and introducing nitrogen gas into the loadlock as a convection warming fluid. However, this warming process takes from approximately five (5) to ten (10) minutes. In particular, wafers from the process chamber must wait until the temperature of the wafers being warmed in the loadlock rises before transferring these wafers out of the loadlock chamber and the deposit of additional unprocessed wafers into the loadlock. This reduces valuable wafer processing time which negatively impacts manufacturing throughput. Accordingly, there is a need to warm wafers or substrates which undergo cryogenic processing above the dew point to avoid unwanted condensation on the surface of the processed wafers.